Abstract
The problem of developing a method of high-speed information processing in the optical switching systems is solved. This method will allow to increase information transfer speed in switching structure also won't demand the high-capacity optical buffer device and will allow to apply optical switchboards in high-performance computing systems and communication systems. The method is based on a parallel search of available data channels algorithm that allows searching for free channels in parallel relation to the background transmission. An optical switch has centralized configuration. The considered switching system has multistage structure. A microcontroller ATmega128 can be used as the control unit. The algorithm of search of free channels of the data, realized in the microcontroller is simulated. In addition for comparing the proposed method with existing ones spatial program had been written. The program simulates the tree ways of packet processing: consecutive, parallel and a one-off. The interest is to estimate the probability of packet delay in the buffer memory of the optical switch for different packet length and for each of three modes of working of the switching system. Simulation results are in the program, we can conclude that the use of parallel processing in the optical switching system allows us to serve incoming packets quickly, which is a positive feature of the system, if the transferred delay-sensitive traffic, and can significantly reduce the size requirements for the buffer memory of optical switch.
Keywords: An optical switching system, a parallel identification, the algorithm, a switching block, a switching cell, microcontroller, the buffer memory, a simulation
References
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